Global Nerdy

I’m currently working with Kforce as a developer relations consultant for HP’s new tiny desktop AI powerhouse, the ZGX Nano (also known as the ZGX Nano G1n). If you’ve wondered about the chip powering this machine, this article’s for you!

The chip powering the ZGX Nano is NVIDIA’s GB10, a combination CPU and GPU where “GB” stands for “Grace Blackwell.” The chip’s two names stand for each of its parts…

Grace: The CPU

The part named “Grace” is an ARM CPU with 20 cores, arranged in ARM’s big.LITTLE (DynamIQ) architecture, which is a mix of different kinds of cores for a balance of performance and efficiency:

• • 10 Cortex-X925 cores. These are the “performance” cores, which are also sometimes called the “big cores.” They’re designed for maximum single-thread speed, higher clock frequencies, and aggressive out-of-order execution, their job is to handle bursty, compute-intensive workloads such as gaming and rendering, and on the ZGX Nano, they’ll be used for AI inference.
  • 10 Cortex-A725 cores. These are the “efficiency” cores, which are sometimes called the “little cores.” They’re designed for sustained performance per watt, running at lower power and lower clock frequencies. Their job is to handle background tasks, low-intensity threads, or workloads where power efficiency and temperature control matter more than peak speed.

Blackwell: The GPU

The part named “Blackwell’ is NVIDIA’s GPU, which has the following components:

• • 6144 neural shading units, which act as SIMD (single-instruction, multiple data) processors that act as “generalists,” switching between standard graphics math and AI-style operations. They’re useful for AI models where the workloads aren’t uniform, or with irregular matrix operations that don’t map neatly into 16-by-16 blocks.
  • 384 tensor cores, which are specialized matrix-multiply-accumulate (MMA) units. They perform the most common operation in deep learning, C = A × B + C, across thousands of small matrix tiles in parallel. They do so using mixed-precision arithmetic, where there are different precisions for inputs, products, and accumulations.
  • 384 texture mapping units (TMUs). These can quickly sample data from memory and do quick processing on that data. In graphics, these capabilities are use to resize, rotate, and transform bitmap images, and then paint them onto 3D objects. When used for AI, these capabilities are used to perform bilinear interpolation (used by convolutional neural network layers and transformers) and sample AI data.
  • 48 render output units (ROPs). In a GPU, the ROPs are the final stage in the graphics pipeline — they convert computed fragments into final pixels stored in VRAM. When used for AI, ROPs provide a way to quickly write the processing results to memory and perform fast calculations of weighted sums (which is an operation that happens with all sorts of machine learning).

128 GB of unified RAM

There’s 128GB of LPDDR5X-9400 RAM built into the chip, a mobile-class DRAM type designed for high bandwidth and energy efficiency:

• The “9400” in the name refers to its memory bandwidth (the speed at which the CPU/GPU can move data between memory and on-chip compute units) of 9.4 Gb/s per pin. Across a 256-bit bus, this provides almost 300 GB/s peak bandwidth

• LPDDR5X is more power-efficient than HBM but slower; it’s ideal for compact AI systems or edge devices (like the ZGX Nano!) rather than full datacenter GPUs.

As unified memory, the RAM is shared by both the Grace (CPU) and Blackwell (GPU) portions of the chip. That’s enough memory for:

• Running large-language-model inference up to 200 billion parameters with 4-bit weights

• Medium-scale training or fine-tuning tasks

• Data-intensive edge analytics, vision, or robotics AI

Because the memory is unified, it means that the CPU and GPU share a single physical pool of RAM, which eliminates explicit data copies.

The RAM is linked to the CPU and GPU sections using NVIDIA’s C2C (chip-to-chip) NVLINK , their low-power interconnector that lets CPU/GPU memory traffic move at up to 600 GB/s aggregate. That’s faster than PCIe 5! This improves latency and bandwidth for workloads that constantly exchange data between CPU preprocessing and GPU inference/training kernels.

Double the power with ConnectX

If the power of a single ZGX Nano wasn’t enough, there’s NVIDIA’s ConnectX technology, which is based on a NIC that provides a pair of 200 GbE ports, enabling the chaining/scaling out of workload across  two GB10-based units. The doubles the processing power, allowing you to run models with up to 400 billion parameters!

The GB10-powered ZGX Nano is a pretty impressive beast, and I look forward to getting my hands on it!